ASIC Engineering Director

Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

Blue Origin is seeking an experienced ASIC Engineering Director & Site Leader to establish and lead the ASIC engineering organization in Krakow, Poland. The Krakow team will have a strong emphasis on design verification, while also developing capabilities in front-end design, digital architecture and implementation, embedded hardware integration, and selected digital-top mixed-signal functions. The Krakow organization will contribute to the development of complex communication systems and high-performance SoCs for TeraWave supporting Blue Origin’s mission of enabling millions of people to live and work in space for the benefit of Earth. The successful candidate will combine deep technical expertise in ASIC and communication SoC development with demonstrated experience building high-performing teams, establishing effective engineering processes, and delivering complex silicon products. In addition to leading the ASIC organization, this person will serve as the Krakow engineering site leader and will have responsibility for the site’s shared ASIC and prototype integration laboratory. Lab execution will be supported through technical leads in design verification, software, firmware, and RF/mixed-signal engineering. The lab will support FPGA prototyping, hardware-in-the-loop testing, embedded software and firmware integration, modem and digital beamformer development, and system-level debug. This role will partner closely with ASIC, systems, software, firmware, analog/mixed-signal, RF, physical design, DFT, product engineering, and program leadership teams across Blue Origin. While this position is not expected to directly manage the analog/mixed-signal organization, prior experience with communication SoCs and digital-top mixed-signal design, integration, and verification will be highly valuable.

Responsibilities

• Establish, lead, and grow the Krakow ASIC engineering organization, initially with a strong focus on design verification and expanding into front-end design, digital architecture, and related digital functions.

• Define and execute the organization’s technical strategy, staffing plan, operating model, engineering processes, and development roadmap.

• Recruit, develop, mentor, and retain engineering managers, technical leads, staff engineers, and individual contributors.

• Build a culture of technical excellence, ownership, collaboration, accountability, and continuous improvement.

• Lead ASIC development across the product lifecycle, from requirements and architecture through RTL design, verification, implementation, tape-out, silicon bring-up, and product qualification.

• Own the Krakow team’s execution against program commitments, including scope, schedule, quality, staffing, resource planning, and risk management.

• Establish scalable ASIC verification methodologies and infrastructure for block-, subsystem-, and SoC-level verification.

• Ensure disciplined verification planning and closure, including requirements traceability, test planning, functional and code coverage, assertions, formal verification, emulation, FPGA prototyping, gate-level simulation, software simulation, and regression management.

• Build strong collaboration between design and verification teams to improve design quality, reduce integration risk, and accelerate issue discovery and closure.

• Support the development of digital front-end capabilities, including RTL design, microarchitecture, CDC/RDC, lint, clocking, low-power and multi-voltage design, interface integration, and design quality.

• Provide technical oversight for integration of complex digital and communication SoCs, including processors, bus fabrics, DMA, NoCs, memory controllers, highspeed interfaces, external IP, and analog/mixed-signal macros.

• Guide development and verification of DSP-intensive communication systems, including modem architectures, coding and framing, PHY and MAC functions, FIR filters, CORDIC, FFT/IFFT, MAC engines, circular buffers, and time-bound data movement.

• Promote the use of golden reference models and cross-domain verification using MATLAB, System C, C/C++, Python, and System Verilog.

• Ensure robust verification of digital-top mixed-signal systems through appropriate behavioral models, co-simulation, analog macro abstraction, and system-level validation.

• Partner with analog/mixed-signal and RF leaders to establish effective specifications, interfaces, models, integration plans, and verification strategies.

• Support implementation, DFT, LEC, floorplanning, static timing analysis, power analysis, physical verification, and signoff activities.

• Establish effective flows between ASIC and FPGA implementations, emulation, prototyping, pre-silicon verification, and post-silicon validation.

• Partner with software and firmware teams on hardware/software co-simulation, processor integration, boot flows, drivers, diagnostics, and system-level validation.

• Participate in silicon bring-up, characterization, failure analysis, root-cause investigation, and corrective action following tape-out.

• Lead technical reviews, architecture assessments, design reviews, verification reviews, and lessons-learned activities.

• Serve as the accountable engineering leader for the Krakow ASIC and prototype integration lab, with execution delegated through technical leads for design verification, software, firmware, and RF/mixed-signal engineering.

• Ensure that shared lab infrastructure effectively supports FPGA prototyping, hardware-in-the-loop testing, embedded software and firmware integration, modem and digital beamformer development, and system-level debug.

• Establish appropriate processes for lab planning, equipment configuration, prototype tracking, test automation, data management, maintenance, calibration, safety, and infrastructure reliability.

• Partner with facilities, IT, security, procurement, and EHS teams on lab operations, equipment procurement, physical infrastructure, access controls, and safe operation.

• Manage lab capacity and capital planning in alignment with program priorities and organizational growth.

• Develop strong working relationships with engineering leaders and stakeholders in Krakow and across Blue Origin’s global organization.

• Represent the Krakow ASIC organization in program reviews, planning activities, technical forums, and executive discussions.

• Establish a collaborative, inclusive, and high-performing Krakow engineering site culture in partnership with other functional leaders.

• Support local site operations, workforce planning, employee development, engineering communications, and cross-functional coordination.

• Travel as required to support collaboration with other Blue Origin locations, suppliers, technology partners, and program teams.

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.

• 15+ years of relevant experience in ASIC, SoC, semiconductor, or complex digital system development.

• 8+ years of experience leading engineering organizations, including responsibi