Principal Electrical Design Engineer

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Job Description

Principal Electrical Design Engineer

Board Hardware Engineering

About the Role

We are seeking a Principal Electrical Design Engineer to define and drive the architecture, design, and technical strategy for advanced board-level hardware across next-generation networking and high-performance connectivity platforms. This role encompasses complex hardware systems including chassis boards, NIC cards, PCIe Gen6 platforms, and 800G Ethernet products.

This is a principal-level technical leadership role requiring deep domain expertise, strategic vision, and organizational influence. You will set the technical direction for board architecture, establish design methodologies, drive innovation in high-speed system design, and serve as the top technical authority across multiple programs. You will partner with and influence silicon, SI/PI, mechanical, firmware, manufacturing, system, and executive teams to deliver industry-leading products from concept through production and beyond.

Key Responsibilities

Technical Strategy and Architecture Leadership

• Define and own the board-level hardware architecture and technical roadmap across multiple product lines and platform generations

• Establish design standards, methodologies, and best practices that scale across the hardware engineering organization

• Drive architectural tradeoff decisions for complex multi-layer PCBs integrating high-speed digital, analog, and mixed-signal circuitry, balancing performance, cost, schedule, and manufacturability

• Get involved and drive discussions on stack-up strategy, impedance optimization and other SI relates development work

• Own power delivery architecture strategy including multi-rail regulation topologies, advanced sequencing schemes, transient response optimization, protection philosophies, and power budgeting across platform generations

• Define and evolve hardware implementation strategies for management and control interfaces such as I2C, SPI, GPIO, MDIO, and debug and observability architectures

Electrical Design Ownership

• Own schematic capture and board-level design for complex multi-layer PCBs with high-speed digital, analog, and mixed-signal circuitry

• Serve as the technical authority for board-level hardware development across high-performance server and connectivity platforms, including NIC cards, PCIe add-in cards, and chassis-integrated hardware

• Provide technical oversight and approval for schematic capture and board-level designs across multiple designs

• Lead component strategy and qualification roadmaps in partnership with suppliers, sourcing, and manufacturing teams

• Drive design-for-excellence initiatives including DFT, DFM, and DFR to systematically improve manufacturability, yield, reliability, and production readiness across all programs

Bring-Up, Validation, and Debug Leadership

• Define and own the bring-up and validation strategy for new hardware platforms, establishing frameworks that improve first-pass success rates across the organization

• Lead root-cause analysis of the most complex and escalated hardware issues across high-speed interfaces, power delivery, clocks, resets, and control paths

• Drive systemic improvements to debug methodologies, validation coverage, and failure analysis processes

• Partner with firmware, software, and system teams to define and validate initialization sequences, telemetry, diagnostics, and platform-level functionality

• Own corrective action frameworks and feed lessons learned into design standards and review processes

Cross-Functional Impact

• Serve as the technical point of escalation and decision-maker for hardware design challenges across the organization

• Work closely with SI/PI, mechanical, thermal, firmware, system, and manufacturing teams throughout the product lifecycle, driving alignment and resolving cross-domain technical conflicts

• Interface with silicon vendors and internal ASIC teams at a strategic level on platform architecture, bring-up, errata resolution, compliance, and next-generation readiness

• Mentor and develop senior and lead engineers, raising the technical bar across the hardware engineering team

• Lead and contribute to design reviews and architectural reviews, and technical publications that advance the team’s collective expertise

• Represent the hardware engineering organization in executive reviews, customer engagements, and industry forums as needed

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering or a closely related field; advanced degree preferred

• 12+ years of progressive hardware design experience with deep expertise in board-level electrical engineering and demonstrated technical leadership across multiple product generations

• Extensive track record of architecting and delivering production hardware for server, networking, storage, or high-performance compute systems at scale

• Expert-level experience with high-speed SerDes-based systems supporting Ethernet, PCIe, or related protocols; deep hands-on experience with PCIe Gen5/Gen6 and 400G/800G Ethernet system design

• Expert understanding of signal integrity fundamentals including impedance control, differential pair routing, channel loss optimization, crosstalk mitigation, and layout review for high-speed interfaces

• Expert power integrity and PDN design knowledge including advanced sequencing, decoupling strategies, transient response optimization, and power architecture tradeoffs at system level

• Mastery of industry-standard schematic capture and PCB design and review tools such as Cadence Allegro or OrCAD

• Proven track record leading hardware bring-up and debug of complex platforms using oscilloscopes, protocol analyzers, and advanced lab instrumentation

• Demonstrated ability to lead cross-functional teams and influence technical direction across organizational boundaries from architecture through validation and production

• Strong track record of mentoring engineers and elevating team capabilities

Preferred Qualifications

• Experience defining architecture for NIC cards, accelerator cards, or other PCIe add-in card platforms across multiple generations

• Experience leading server chassis or system board design programs in dense, thermally constrained, high-availability environments

• Deep expertise with 800G Ethernet and emerging 1.6T electrical interfaces and system integration challenges

• Experience architecting solutions using retimers, redrivers, advanced clocking architectures, and high-speed interconnect subsystems

• Expertise in compliance and validation workflows for PCIe and Ethernet platforms, including contributions to industry specifications or standards bodies

• Experience driving contract manufacturer relationships, production ramp strategies, and yield optimization for complex hardware products

• Scripting and automation proficiency in Python or similar languages for lab automation, measurement analysis, hardware characterization workflows, and design flow optimization

• Experience influencing product strategy and roadmap decisions at the organizational level

Base pay range for this role is $185,000