Coherency Verification Engineer

At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently seeking a Coherency Verification Enginee r to join one of our clients ' teams. If you're looking for an exciting opportunity to grow in a innovative environment, this could be the perfect fit for you.

Responsibilities:

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Verify complex digital designs at RTL level according to architecture and design specifications.

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Develop and maintain verification environments using SystemVerilog and UVM.

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Create, execute, and debug test plans for block-level, subsystem-level, and top-level verification.

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Work on the verification of coherent systems, including cache-related functionality and interconnect behavior.

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Validate designs involving CHI protocol, cache structures, coherency mechanisms, and system-level interactions.

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Run and manage simulations, regressions, and debug failures using industry-standard verification tools.

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Apply both formal and dynamic verification methodologies to identify design issues early.

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Use scripting languages such as Python, Perl, Bash, or TCL to automate verification flows and regression processes.

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Collaborate closely with architecture, design, and verification teams to analyze specifications, clarify requirements, and resolve issues.

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Track, document, and communicate verification progress, bugs, coverage status, and technical risks.

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Contribute to continuous improvement of verification methodology, tools, and best practices.